Perhaps Moore’s law isn’t doomed just yet. Maybe. IBM Research (NYSE: IBM) reported in a paper in Science today a technique for making carbon nanotube transistors with tiny (~9nm) contacts that exhibit low, size-independent resistance. This overcomes a huge hurdle in shrinking transistor size beyond current limits.
“I think this is the first carbon nanotube transistor demonstration with such a small, low resistance contact,” said Shu-Jen Han, manager of the Nanoscale Science & Technology Group at IBM Research and an author on the paper (End-bonded contacts for carbon nanotube transistors with low, size-independent resistance).
“This is critically important for extending Moore’s law,” Han continued. “We all know the carbon nanotube has excellent electrical properties; the carriers move much faster in carbon nanotubes than silicon. That’s why we are all, including IBM, so interested in them. The big challenge has been contact size. I would argue it’s now more important than the channel [in the efforts to shrink transistors].”
Here’s a portion of the paper’s abstract:
“Carbon nanotubes provide high-performance channels below 10 nanometers, but as with silicon, the increase in contact resistance with decreasing size becomes a major performance roadblock. We report a single-walled carbon nanotube (SWNT) transistor technology with an end-bonded contact scheme that leads to size-independent contact resistance to overcome the scaling limits of conventional side-bonded or planar contact schemes. A high-performance SWNT transistor was fabricated with a sub–10-nanometer contact length, showing a device resistance below 36 kilohms and on-current above 15 microampere per tube. The p-type end-bonded contact, formed through the reaction of molybdenum with the SWNT to form carbide, also exhibited no Schottky barrier. This strategy promises high-performance SWNT transistors enabling future ultimately scaled device technologies.”
Earlier this summer, IBM unveiled the first 7 nanometer node silicon test chip, pushing the limits of silicon technologies and ensuring further innovations for IBM Systems and the IT industry. By advancing research of carbon nanotubes to replace traditional silicon, IBM is hoping to pave the way for a post-silicon future and delivering on its $3 billion chip R&D investment announced in July 2014.
“These chip innovations are necessary to meet the emerging demands of cloud computing, Internet of Things and Big Data systems,” said Dario Gil, vice president of Science & Technology at IBM Research. “As technology nears the physical limits of silicon, new materials and circuit architectures must be ready to deliver the advanced technologies that will drive the Cognitive Computing era. This breakthrough shows that computer chips made of carbon nanotubes will be able to power systems of the future sooner than the industry expected.”
Sooner than expected doesn’t necessarily mean soon. Han says it may take 10 years or so to flesh out all the problems.
Source: IBM
“This is an important advance but there are many other challenges to be solved such as how to purify the nanotubes, how to place them properly, and we also made good progress there but when we are talking about new technology so many things have to be right. People tend to divide the technology into two parts, materials and the device. Solving the contact size is probably top challenge on the device side. There are still a bunch of issues on the materials side,” said Han.
Indeed the paper points out, “We have only demonstrated p-channel SWNT transistors using p-type end contacts. It will be difficult to form end-bonded n-type contacts to SWNTs in which electrons are directly injected into the conduction band of SWNTs with this carbide formation approach as metals with low enough work function tend to oxidize first rather than react with C. However, it is still possible to realize n-channel SWNT device operation even with end-bonded contacts to high work function metals through electrostatic doping in the vicinity of the source electrode.”
Caveats aside, this is an impressive advance. After decades of processor performance gains, clock rates have stalled in the 3-5GHz range as silicon MOSFETs approach their physical limits. Carbon nanotubes are one of the most promising replacements for silicon in semiconductors. IBM has previously shown that carbon nanotube transistors can operate as excellent switches at channel dimensions of less than ten nanometers – the equivalent to 10,000 times thinner than a strand of human hair and less than half the size of today’s leading silicon technology.
“Single-walled carbon nanotubes (SWNTs) potentially offer the optimal performance as the channel material for ultrascaled FETs,” write Han and coauthors, “The SWNT saturation velocity is several times higher than that of Si, and the intrinsic thinness (~1 nm in diameter) of SWNTs provides the superior electrostatic control needed for devices with ultrashort Lch (channel length). Indeed, SWNT transistors with 9 nm Lch outperform the best Si MOSFETs with similar Lch.”
The key obstacle to ultrascaling carbon nanotube transistor technology has been forming low-resistance and scalable contact. The recent work achieves that. Earlier work has relied on so-called side-bonded contacts (conducting metal deposited along the length of the nanotube channel), which exhibited contact-length-dependent resistance behavior – the smaller the contact area, the greater the resistance.
Schematics showing the conversion from a side-bonded contact (left), where the SWNT is partially covered by Mo, to end-bonded contact (right), where the SWNT is attached to the bulk Mo electrode through carbide bonds while the carbon atoms from originally covered portion of the SWNT uniformly diffuse out into the Mo electrode. Source: IBM
IBM Research group overcame the challenge with development of an end-bonded contact in which “the SWNT channel abruptly ends at the metal electrodes through a solid-state reaction between the nanotube and deposited Molybdenum (Mo) electrodes. Although the carrier injection area is limited to a ~2nm2 no barrier was observed for hole transport and resistance remained low.”
“For any advanced transistor technology, the increase in contact resistance due to the decrease in the size of transistors becomes a major performance bottleneck,” said Han. “Our novel approach is to make the contact from the end of the carbon nanotube, which we show does not degrade device performance. This brings us a step closer to the goal of a carbon nanotube technology.”
Besides helping to extend Moore’s law, Han foresees many other interesting applications for carbon nanotube transistors such as the base material for flexible electronics and transparent electronics.
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