On April 19, 1965, Electronics magazine published a paper in which Gordon Moore made a stunning observation: About every two years, engineers should be able to cram twice as many transistors into the same area of a silicon chip.
Over the next 50 years, engineers more or less managed to maintain that predicted pace of innovation, delivering dramatically better semiconductors. Their efforts were central to the seeming magic of a high tech sector riding an exponential growth curve that became known as Moore’s law.
Of the thousands of engineers who have kept Moore’s law going, EE Times interviewed a trio of top chip technologists who shared their stories and optimism that progress will continue.
To date the progress Moore’s law represents has not been limited to “just ever faster and cheaper computers but an infinite number of new applications from communications and the Internet to smart phones and tablets,” said Robert Maire, a semiconductor analysts writing in a recent newsletter.
“No other industry can claim similar far reaching impact on the lives of so many people…[in] less than a lifespan, more changes in the world can be traced back to the enabling power of the semiconductor industry than any other industry…More lives have been saved and fortunes impacted,” Maire wrote.
Those benefits are measured in trillions of dollars, according to G. Dan Hutcheson, chief executive of VLSI Research. He calculates the deflationary value of packing more features into the same silicon area at $67.8 billion last year alone, with a knock-on value of half a trillion dollars to the overall electronics industry that used the chips.
“The market value of the companies across the spectrum of technology driven by Moore’s Law amounted to $13 trillion in 2014,” Hutchison estimated. “Another way to put it is that one-fifth of the asset value in the world’s economy would be wiped out if the integrated circuit had not been invented and Moore’s law never happened,” he said.
For engineers like Mark Bohr, Moore’s law was the heartbeat of daily life at Intel, driving it to its longstanding position as the world’s biggest chip maker.
“By the time I joined the company in 1978, the concept was well engrained in Intel culture,” said Bohr, now a senior fellow in Intel’s manufacturing group. “What started out as an observation became a guide for us all that we felt we needed to follow and, if possible, faster than anyone else in the industry,” he said.
Bohr still recalls one of his rare interactions with Moore who in 1978 was Intel’s chief executive. As a recent college grad six months into his job at Intel, Bohr developed a new contact etching process and sent a report on it to his boss and senior engineers in his group, copying Moore.
“I knew Gordon was an engineer at heart and thought he might be interested,” Bohr recalled. “A week later he sent back the front page where he wrote, ‘Hey Mark, looks great. Make sure other engineers know about it,’” he said, noting he still keeps the page in his office.
“I spent rest of my career in Oregon so we rarely met and interacted, but I was in a few meetings where some of my superiors gave presentations to him,” Bohr recalled. “He was more the quiet type and listened and then spoke up occasionally with words of wisdom — he was not a table pounder like some CEOs,” he said.
Chenming Hu is often cited as the father of the FinFET, the 3-D transistor that is one of the latest advances driving Moore’s Law. He still recalls meeting Moore at a lunch in 1969 when he turned down a job offer to work under him:
I was a grad student from Taiwan at Berkeley and [Intel executive] Andy Grove taught one of my courses. At the end of the course I got a call in the dorm and at the other end was Andy. He said why not come for an interview at Intel. I had lunch with Gordon and Robert Noyce as well. I was offered a job at Intel, but I turned it down to stay for a PhD because that’s what my parents wanted me to do.
Things worked out. Today Hu is professor at Berkeley and a former chief technologist at Taiwan foundry giant TSMC.
Hu considers Moore’s Law “a challenge, a self-fulfilling prophecy…and a testament to the ingenuity of engineers, in particular the manufacturing engineers who make things so small…They are the heroes and should be given more credit than they usually get. It’s not clever ideas so much as tens of thousands of engineers who make things small and at such high yields,” he said.
In the mid-1990s simulations started showing that transistors would become so small they would be hard to turn completely off. Like leaky faucets they would begin to drain away more power than they actually consumed.
“People were thinking CMOS would not go beyond 0.1 micron — we didn’t even use nanometer measurements then,” Hu said.
To address the looming crisis, the U.S. Defense Advanced Research Projects Agency launched a program to create a new kind of 25nm switch. In 1997, Hu proposed two ideas and won a contract to work on them. Two years later he reported his ideas — the ultra-thin body silicon-on-insulator (UTB SOI) and a new kind of 3D transistor he called the FinFET.
At that time, engineers debated whether the industry could ramp up sufficient supply of SOI wafers with the 5nm thin films required for UTB.
“That was 20x thinner than could be done in the year 2000,” Hu said. “Most companies decided it was easier to develop the skills to etch a thin fin than to work on the SOI industry,” he added.
Fast forward to 2015 and the availability of thin-film SOI wafers is no longer an obstacle. STMicroelectronics, Samsung and others are backing the technology, but an even broader set of companies is adopting FinFETs.
“I think both will coexist,” said Hu. “The thing that stuck in my mind was how quickly the industry picked up on FinFETs.
“I had been in long term research for a long time and had never seen a case where industry immediately picked something up,” he said. “I was invited to several companies — multiple times to Intel — and within two years FinFETs were on the industry road map as a successor to the planar transistor and UTB SOI was added a year later — that was quite a surprise to me,” he added.
It takes teams of teams to drive semiconductor innovations forward, said Bijan Davari, an IBM fellow, noted for his work on introducing copper interconnects in the 1990s. Davari got his PhD in semiconductor technology and joined IBM in 1984 when chips were still made at dimensions bigger than a micron.
Early in his career, Davari worked with Robert Dennard. Engineers were vigorously debating the pros and cons of bipolar and CMOS technologies, Davari recalled:
At that time it was thought high performance chips could only be made with bipolar technology, but it dissipated way too much power. CMOS used less power and could integrate more functions but was less fast.
There were debates that low voltage CMOS was only good for applications such as digital watches…but we were basically putting forward the idea that all high performance logic could be made in CMOS.
Eventually both Intel and IBM shifted to CMOS, setting the industry direction. For IBM the shift came when it decided to make its mainframe computers using one CMOS processor rather than tens of bipolar chips. Uniprocessor performance declined, but IBM invented parallel processing technologies to bring overall system performance up, and CMOS saved space and money thanks to new cooling and packaging techniques.
“Eventually, the whole industry shifted to CMOS for both high performance and low power and that’s when I became an IBM fellow for showing that could be done,” he said.
In the early 1990s engineers started hitting difficulties making the fine lines needed for the latest chips due to limits with their aluminum interconnects. IBM researchers had showed the advantages of copper interconnects but using them would require several new manufacturing techniques. “Copper could not be etched like aluminum, and it had a poisoning effect at the device level,” Davari said.
About six teams of engineers worked on multiple advances in insulating, electroplating and polishing.
All these steps were so different from anything ever done with interconnect wiring. We had parallel activities with very rigorous measurements.
We had to change the tooling in the manufacturing lines where we made mainframes and other systems. A mistake there could have caused serious problems with product schedules. We had to work with many tool manufacturers to line up an ecosystem to make it robust. We helped create whole companies that became significant because of copper…and then it came together after three or four years and we put it out in a product.
Even rivals at Intel give Davari’s team credit. “Intel can justifiably say it invented strained silicon and high-k metal gates and was the first company to put FinFETs in production, but I will tip my hat to IBM on copper,” said Bohr of Intel, adding that he regards Davari as a friend.
“I have a great deal of respect for him as a technologist,” Bohr said. “We don’t see each other that often but when we are at a conference we seek each other out. It’s not like we were spilling secrets over drinks, but there were things we could ask each other’s opinions on,” he added.
Engineers face challenges at every process node that typically seem worse than past hurdles.
“Each one seemed to be daunting a few years before we got to it, and a few years after we looked back we said that was easy and we saw it as a golden era — these perceptions change,” said Intel’s Bohr. “I still remember around 1980 trying to make the transition from two- to one-micron pitches — that looked terrifying to us, we didn’t know how we could do that, but in retrospect it was easy,” he said.
For example, the 130nm node was the first to use copper interconnects. “It started out being much feared and ended up being not only cheaper to do but higher yielding than any of us expected,” said Bohr. More recently, “we thought the 22nm node [Intel’s first with FinFETs] would be a devil to get to yield, but today it’s our highest yielding and lowest defect-density process ever,” he added.
Often progress comes from intuitive choices made to keep up with the heady pace set by Moore’s Law. “You never have all the data you want, since you have this clock ticking you have to commit a technology to a certain goal,” said Bohr, recalling at several stages making tough calls to burn the boats and march on.
For instance, at the 45nm node, Intel had been working on high-k metal gates.
The research group and early process development teams had some working transistors but their yield and reliability were poor and their performance was not what we wanted, but time was up. We looked around at a meeting of the five or six engineers who had responsibility for the 45nm node and asked, ‘Can we make it work,’ and the answer that came back from each one was, ‘Yes.’ When you have experts like that, they know how to extrapolate beyond the data.
A decision made years ago not to use SOI was easier.
SOI never quite made it out of research phase. It just wasn’t up to delivering the benefits that would outweigh its costs and complexity. Once we made that decision there was no going back. But I would not go back and change anything. I think we made the right calls.
As Moore's Law moves into its fifties it is certainly seeing its share of issues. Just like a person in their fifties it takes a lot more to keep things going at the same pace as when it was younger, writes analyst Maire
He jokes that like an elderly person with troubled eye sight, the first thing to fail in semiconductors was its lithography tools. Despite Herculean efforts at alternatives, the industry uses enhanced versions of the same 193nm litho tools it has employed for more than a decade.
“No exponential growth can go without an end,” said Hu of Berkeley, recalling an elementary school teacher’s riddle about how long you can continue to cut a rope in half.
“We are getting to the point where we are counting atoms, but I think Moore’s law end will come earlier than that,” Hu said. “In making things smaller in linear dimensions I believe we are not far from the end, so we will have to look for other ways forward,” he added.
Various kinds of vertical stacks hold much promise, said Hu citing everything from his FinFETs to recent advances in 3D NAND flash chips. “I expect some new manufacturing heroes will rise up and have different ways of making things that are cheaper,” he said.
For his part Hu is researching tunneling transistors and other ways to let circuits run at 0.1V. Nanometer-scale MEMS transistors and negative-capacitance transistors also hold promise, he said, noting the need to reduce power consumption and heat are today’s top challenges.
IBM’s Davari sees plenty of opportunity for progress at the systems level. “It won’t be like traditional Moore’s Law scaling in the future, it will be more of a combination of things,” he said.
“Performance came from frequency enhancements from megahertz to gigahertz, a thousand-fold progress in 20 years, and most of that came from device scaling,” he said. “Now because that has almost come to a stop, we have to go to parallel computing with many cores and accelerators,” said Davari who since 2003 oversees a group researching advances that span areas from multicore silicon to analytics software.
“The next steps will be even more interesting…its absolutely fascinating because there are so many nobs to turn,” he said.
Davari is optimistic users will continue to see tenfold performance gains at the systems level every five years or so.
Basically power dissipation remains the most serious bottleneck and will drive the introduction of new materials such as silicon germanium. I think [Moore’s law] will keep going. I can see my way clearly through 7nm and 5nm is not that questionable — that’s 10-15 years from now.
After that, very interesting work is going on with new switches built in carbon nanotubes and new computation models such as quantum computing and brain-inspired modes which are not classical computing but the beginning of a powerful new acceleration technology for uses such as pattern recognition of moving objects.
Intel’s Bohr agrees that 3D structures will become more important. He said the kind of through-silicon vias used for today’s chip stacks need to improve in their density by orders of magnitude.
Overall, “I don’t think [Moore’s law] will end, it will evolve and change in terms of what we do,” Bohr said. “Our industry’s ability to innovate and develop ICs of one sort of another will continue for a long time…exponentials are difficult to sustain, [so] the slope [of progress] may not be quite as steep ten years from today as now, but it will continue,” he said.
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